Chapter 5: RISC-V ― opening up the "language"
At the end of Chapter 4, we placed this question: "What if the shared language of chips (the ISA) belonged to no one, needed no toll, and anyone in the world could use it freely?" This chapter is the story of the lead that actually answered that question — RISC-V. And there is a note you absolutely cannot skip: "free" and "open" are not the same thing. Let's go in order.
5.1 It began as a university "summer research project"
RISC-V was not born of a large company's ambition. Its starting point was 2010, at the University of California, Berkeley. Professor Krste Asanović and two graduate students (Yunsup Lee and Andrew Waterman) needed a freely usable CPU "template" for a summer research project. David Patterson, known as a father of RISC, also joined.
They first tried to use existing x86 or ARM. But — as we saw in Chapter 4 — those languages are possessions. Even if they could sign a contract, they couldn't freely modify it, or share their research results with colleagues around the world. That won't do for research. "There's no free language we can use anywhere. Then let's make one ourselves" — and so, as a summer's side project, a new ISA was born.
5.2 Why "Five" (V)?
The "V" in the name is the Roman numeral 5. At Berkeley, CPU research under the name RISC had continued across generations since 1981, and this was the fifth (the fifth generation) — hence "RISC-V." So it's read not "RISC-vee" but "RISC-five." It is the newest work in a lineage of research with history.
※ A bit of trivia. The first RISC-I and II were in 1981. Later generations, which had gone by other names, were counted back afterward as "III and IV." RISC-V is the legitimate fifth. It looks like a newcomer, but it in fact stands on more than 40 years of accumulated research.
💡 So when does "RISC-VI (RISC-six)" come out?
A natural question. But the answer is — RISC-VI won't come. At least, not in the sense of "it comes because it's the next number." The reason lies in the origin of the name we just saw.
① "V" is not a version number; it's a proper name. It's not a name that turns over by number, like Windows 10 to 11. "RISC-V" is a single brand name. Just as the iPhone stays "iPhone" however many generations pass, the contents evolve but the name stays "RISC-V."
② RISC-V evolves "on the inside." RISC-V is modular, designed to add new extensions (added techniques of instructions) and profiles (like RVA23) "within the same frame called RISC-V." Without changing the name to 6, the contents keep growing. "Name held steady, contents extended" is RISC-V's philosophy itself.
So the most honest answer is this: "There's no need to wait for a 6. The RISC-V you touch will keep evolving, extending its contents, staying RISC-V all the while."
5.3 What was groundbreaking ― it made the toll zero
What was such a landmark about RISC-V? In a word, that it "opened up the shared language itself, free of charge, to anyone." Recall Chapter 4's "toll bridge." RISC-V made that bridge's toll zero. Anyone can design a chip using this language, without a license or royalty (usage fee). Large companies, small workshops, university students, anyone anywhere in the world, on the same terms.
And RISC-V has a "clean-slate" design that carries no baggage from the past, modular so you add only the functions you need. So from the tiniest microcontroller to a large data-center chip, the same language runs through it all. "Free, light, and able to become anything" — this trio caught the world's attention.
5.4 The crucial point ― "free" and "open" are different
Now, the point most easily misunderstood, yet the one you absolutely cannot skip. Hearing "RISC-V is free," you may end up thinking "you can get a chip for nothing." This is plainly wrong. The more knowledgeable someone is about the technology, the more they wince when this is mixed up. Let's separate it precisely.
・The language (ISA) is free for anyone to use. This is what "open" means.
・But an actual chip that speaks that language is an ordinary product (paid for). It is not free.
・A chip's design, too, may be published free, or may be held by a company, closed and paid for.
So what RISC-V opened up is "the rulebook of the shared language everyone uses," not "the product," nor "every design." To put it another way, the Japanese language itself belongs to no one and is free to use, but a book written in Japanese is sold as a product for money. A language being open, and things made in that language being free, are entirely separate matters.
※ Why insist on this distinction? Blur it, and the fantasy "open = everything free" spreads, and the work of the people who actually make chips (paid design and manufacturing) gets taken lightly. What is open is the "base rules." The work of making things on top of it carries proper value, and cost. This healthy line is exactly what supports the RISC-V world.
5.5 Making it everyone's ― to Switzerland, and to the world
RISC-V, born from a summer's research, spread beyond imagination. So in the mid-2010s, an important decision was made. In 2015, management of this language was separated from any particular country or company, and moved to a neutral non-profit, "RISC-V International." The base is Switzerland, known for permanent neutrality.
Why go to a neutral country? So that this language would not be "any one country's or company's." So that the shared language would not be tossed about by conflicts or regulations between nations — to make it a "public language" the whole world can safely lean on. It was a symbolic move. The same year, its creators also founded a company (SiFive), showing a path where "a free language" and "a business earning from it" coexist — a model of the line drawn in 5.4.
5.6 Bonus: how to read the cipher "RV32I"
Touch the RISC-V world and you'll come across cipher-like notations such as "RV32I" and "RV64GC." No need to tense up. These are a kind of name-tag showing "which language this chip speaks, and how far." Reading them is very straightforward.
How to read a RISC-V name-tag (it isn't hard)
───────────────────────────────────────────────────────────────
R V 32 I + (extensions)
| | | +- letters for the "added techniques." e.g. M = multiply/divide / C = compressed / V = vector ...
| | +- the base word length. 32 (for small) or 64 (for high performance)
| +- the mark for "this is RISC-V"
───────────────────────────────────────────────────────────────
e.g.) RV32I = 32-bit, just the most basic (for small microcontrollers)
RV64GC = 64-bit, with the commonly used techniques "all included" (for PC-class)
→ "add only the techniques you need onto a base foundation" = modular. This is RISC-V's lightness.
Once the name-tag's meaning is clear, you can read the "backgrounds" of the stones you see in the news. For instance, the cheap microcontroller "CH32V003" that appears in the course series is an RV32E-family part (an exceptionally small background), while PC-class chips are RV64-family, and so on. You start to see how the same language, RISC-V, changes its form according to use.
5.7 And so RISC-V became "the third pillar"
A summer research project has come to be called "the third pillar," alongside x86 and ARM. A free language belonging to no one handed out, to makers around the world, the permit that says "you may make your own chip" — this is the true nature of the "explosion of who can design" mentioned in the preface. Because the shared language's toll became zero, new challengers could climb up from all over the world.
The language was opened. But even with a good design, if you can't turn it into "an actual chip," it ends as a dream. And in that "making," too, a large upheaval is underway. In the next chapter, Chapter 6, we leave the design story for a moment and turn to the "body" of the chip itself. The transistor has changed from flat to three-dimensional, and the number "2 nm" has lost its old meaning — we'll unmask that.